1. Field of the Invention
This invention relates to an integrated circuit device provided with a circuit for detecting an abnormal condition such as a short circuit or the breaking of a wire.
2. Description of the Related Art
Japanese patent application publication number 9-274515 discloses an actuator fault discriminator which is able to detect not only a disconnection fault of an actuator but also a to-ground short-circuit fault thereof. The actuator fault discriminator and an actuator controller are contained in a microcomputer-based electronic control unit (ECU). The actuator is connected between a battery and the ECU. Under the control by the ECU, a drive current ID caused by the battery flows through the actuator. The ECU includes a CPU and a power transistor. The CPU outputs a drive signal D to the base of the power transistor, thereby implementing ON/OFF control of the power transistor. The emitter of the power transistor is grounded. The collector of the power transistor is connected via a current sensor to the actuator. After passing through the actuator, the drive current ID flows through the current sensor and the collector-emitter path of the power transistor. The current sensor detects the drive current ID, thereby generating a signal representing the detected value Id of the drive current ID. The ECU includes a reference generator for producing a signal representative of a reference current value IR corresponding to a normal condition of the actuator. The ECU includes a comparator for comparing the signal of the detected current value Id and the signal of the reference current value IR, and for detecting a fault of the actuator in response to a result of the comparison. An output signal from the comparator which represents the comparison result is fed to the CPU.
Japanese patent application publication number 10-257799 discloses a multiple-channel output device provided with an output open-circuiting detector. In the output device of Japanese application 10-257799, the coils of stepping motors are connected between a drive circuit and a ground. The drive circuit has output terminals leading to the coils of the stepping motors respectively. The drive circuit has output transistors. The collectors of the output transistors lead to the output terminals, respectively. The emitters of the output transistors are connected to a drive voltage source. A high-resistance resistor is connected between the emitter and the collector of each of the output transistors. The output terminals of the drive circuit are respectively connected to the input terminals of an OR circuit. The OR circuit is connected to a timer capacitor followed by a comparator. When one of the coils of the stepping motors breaks, a high-level voltage is transmitted from the drive voltage source to the OR circuit via the related high-resistance resistor and the related output terminal of the drive circuit so that the OR circuit outputs a high-level signal. The timer capacitor is charged in response to the high-level signal, and hence the voltage across the timer capacitor rises. When the voltage across the timer capacitor exceeds a prescribed level, the comparator outputs a high-level signal indicating that one of the coils of the stepping motors breaks.
Japanese patent application publication number 56-22975 discloses a method of evaluating an integrated circuit device. In Japanese application 56-22975, an integrated circuit has a power supply terminal, a ground terminal, input terminals, and output terminals. A voltage lower than the p-n junction forward voltage is applied between the power supply terminal and the ground terminal while all the input and output terminals remain open. In the case where an integrated-circuit element connected between the power supply terminal and the ground terminal is ideal, no current flows between the power supply terminal and the ground terminal since the voltage applied therebetween is lower than the p-n junction forward voltage. In the event that the integrated-circuit element is out of an ideal condition, a leak current flows between the power supply terminal and the ground terminal. The integrated-circuit element is evaluated on the basis of the leak current.
Japanese patent application publication number 3-54841 discloses a BiCMOS semiconductor device which includes an internal gate circuit, and output buffers connected to the internal gate circuit. The internal gate circuit and the output buffers are formed on a common semiconductor chip. A control terminal, which is used only at the time of test, is provided on the semiconductor chip, and is connected to the output buffers through a wiring layer. The control terminal can be subjected to a control signal designed to turn off bipolar transistors at rear ends of the output buffers. In the case where the control signal is fed to the control terminal while a rating power supply voltage is applied to the semiconductor device, the bipolar transistors at the rear ends of the output buffers are turned off so that a steady-state current does not flow through the bipolar transistors. Accordingly, on the basis of a power supply current measured in this condition, the presence or absence of a failure in the output buffers or a MOS transistor of the internal gate circuit can be detected.
Japanese patent number 2833100 relates to a power semiconductor device including first and second power MOS transistors formed on a common chip. The first and second power MOS transistors are connected in a current mirror. Specifically, the drains of the first and second MOS transistors are connected to a common power source via a power supply terminal of the chip. The gates of the first and second MOS transistors are connected to a common drive circuit. The source of the first power MOS transistor is connected to one end of a load via an output terminal of the chip. The other end of the load is grounded. The source of the second power MOS transistor is connected to one end of a current detecting resistor through a sense/in terminal of the chip. The other end of the current detecting resistor is grounded via an NPN transistor. A first comparator operates to compare the voltages at the sources of the first and second power MOS transistors. By referring to an output signal from the first comparator, it is possible to determine whether a current flowing through the load is normal or abnormal, that is, whether or not the load is normal or abnormal. A second comparator operates to compare the voltage at the source of the second power MOS transistor with a prescribed reference voltage. The drive circuit responds to an output signal from the second comparator, driving the first and second MOS transistors in response thereto.
Japanese patent application publication number 9-242589 discloses an electromagnetic actuator driving circuit designed to prevent the exposure of a high voltage in the event that an electric connector with an electrically-driven fuel injection valve is moved out of its normal position. The driving circuit of Japanese application 9-242589 includes switching devices Q1-Q5 for controlling electric connection among the fuel injection valve, a high-voltage power supply, and a low-voltage power supply in response to a fuel injection pulse signal. At the moment of the occurrence of the rising edge of the fuel injection pulse signal, the switching devices Q1 and Q3 are turned on so that a high voltage is applied from the high-voltage power supply to the fuel injection valve. In this case, the applied high voltage opens the fuel injection valve. After the fuel injection valve is opened, the switching devices Q2 and Q3 are in their on states so that a low voltage is applied from the low-voltage power supply to the fuel injection valve. In this case, the applied low voltage holds the fuel injection valve opened. At the moment of the occurrence of the falling edge of the fuel injection pulse signal, the switching devices Q4 and Q5 are turned on so that a reverse high voltage is applied from the high-voltage power supply to the fuel injection valve. In this case, the applied reverse high voltage closes the fuel injection valve. There are resistors R1-R3 connected with the fuel injection valve. Even when the switching devices Q1-Q5 are in their off states, a small current flows through the resistors R1-R3 and the fuel injection valve. A comparator monitors the voltage at a junction between the resistors R2 and R3, detecting whether or not the current flow line (path) breaks.
Japanese patent number 2550703 relates to a semiconductor device including a semiconductor element having a gage oxide film formed on a semiconductor substrate. A gate terminal enables a drive voltage to be applied to a gate of the semiconductor element. A protective circuit formed on the substrate and connected with the gate terminal prevents a voltage higher than a prescribed level from being applied to the gate of the semiconductor element. An inspection voltage applying circuit formed on the substrate is provided between the gate of the semiconductor element and the protective circuit. The inspection voltage applying circuit disables the protective circuit, and applies an inspection voltage higher than the drive voltage to the gate of the semiconductor device.
It is an object of this invention to provide an improved integrated circuit device.
A first aspect of this invention provides an integrated circuit device comprising an output terminal for connection with a terminal of an external load; first and second power supply terminals for connection with a terminal of an external power supply; a switching element connected between the output terminal and the first power supply terminal, wherein the switching element, the external load, and the external power supply form a load current flow path; an impedance circuit connected between the output terminal and the second power supply terminal; an abnormality detection circuit for monitoring a voltage at the output terminal, and detecting an abnormal condition on the basis of the monitored voltage; and a drive control circuit for driving and controlling the switching element.
A second aspect of this invention provides an integrated circuit device comprising first and second output terminals for connection with a terminal of an external load; a power supply terminal for connection with a terminal of an external power supply; a switching element connected between the first output terminal and the power supply terminal, wherein the switching element, the external load, and the external power supply form a load current flow path; an impedance circuit connected between the second output terminal and the power supply terminal; an abnormality detection circuit for monitoring a voltage at the first and second output terminals, and detecting an abnormal condition on the basis of the monitored voltage; and a drive control circuit for driving and controlling the switching element.
A third aspect of this invention provides an integrated circuit device comprising a package having an output terminal for connection with a terminal of an external load, and a power supply terminal for connection with a terminal of an external power supply; and a chip hermetically provided in the package and having an output-purpose pad and first and second power-supply-purpose pads, the output-purpose pad being connected to the output terminal of the package, the first and second power-supply-purpose pads being connected to the power supply terminal of the package; wherein the chip comprises (1) a switching element connected between the output-purpose pad and the first power-supply-purpose pad, wherein the switching element, the external load, and the external power supply form a load current flow path; (2) an impedance circuit connected between the output-purpose pad and the second power-supply-purpose pad; (3) an abnormality detection circuit for monitoring a voltage at the output-purpose pad, and detecting an abnormal condition on the basis of the monitored voltage; and (4) a drive control circuit for driving and controlling the switching element.
A fourth aspect of this invention provides an integrated circuit device comprising a package having an output terminal for connection with a terminal of an external load, and a power supply terminal for connection with a terminal of an external power supply; and a chip hermetically provided in the package and having first and second output-purpose pads and a power-supply-purpose pad, the first and second output-purpose pads being connected to the output terminal of the package, the power-supply-purpose pad being connected to the power supply terminal of the package; wherein the chip comprises (1) a switching element connected between the first output-purpose pad and the power-supply-purpose pad, wherein the switching element, the external load, and the external power supply form a load current flow path; (2) an impedance circuit connected between the second output-purpose pad and the power-supply-purpose pad; (3) an abnormality detection circuit for monitoring a voltage at the first and second output-purpose pads, and detecting an abnormal condition on the basis of the monitored voltage; and (4) a drive control circuit for driving and controlling the switching element.
A fifth aspect of this invention provides an integrated circuit device comprising an output terminal for connection with a terminal of an external load; a power supply terminal for connection with a terminal of an external power supply; a switching element connected between the output terminal and the power supply terminal, wherein the switching element, the external load, and the external power supply form a load current flow path; an impedance circuit and a switch circuit connected in series between the output terminal and the power supply terminal; an abnormality detection circuit for monitoring a voltage at the output terminal, and detecting an abnormal condition on the basis of the monitored voltage; a drive control circuit for driving and controlling the switching element; and a switch control circuit for setting the switch circuit in a closed state under a condition that the drive control circuit is fed with an operation-purpose power supply voltage.
A sixth aspect of this invention is based on the fifth aspect thereof, and provides an integrated circuit device wherein the switch control circuit comprises means for setting the switch circuit in the closed state when the operation-purpose power supply voltage is equal to or higher than a reference voltage.
A seventh aspect of this invention is based on the sixth aspect thereof, and provides an integrated circuit device wherein the switch circuit comprises a transistor, and the switch control circuit comprises (1) a voltage divider for dividing the operation-purpose power supply voltage to get a division-resultant voltage, (2) a comparison circuit for comparing the division-resultant voltage and the reference voltage with each other, and (3) a drive circuit for driving the transistor in response to a comparison-result signal outputted from the comparison circuit.
An eighth aspect of this invention is based on the fifth aspect thereof, and provides an integrated circuit device wherein the switch circuit comprises a transistor, and the switch control circuit comprises (1) means for dividing the operation-purpose power supply voltage to get a division-resultant voltage, and means for applying the division-resultant voltage to a control terminal of the transistor.
A ninth aspect of this invention is based on the first aspect thereof, and provides an integrated circuit device wherein the impedance circuit comprises a resistor.
A tenth aspect of this invention provides an integrated circuit device comprising an output terminal for connection with a terminal of an external load; a power supply terminal for connection with a terminal of an external power supply; a switching element connected between the output terminal and the power supply terminal, wherein the switching element, the external load, and the external power supply form a load current flow path; an abnormality detection circuit for monitoring a voltage at the output terminal, and detecting an abnormal condition on the basis of the monitored voltage; a drive control circuit for driving and controlling the switching element; and a constant-current circuit connected between the output terminal and the power supply terminal for generating a constant current under a condition that the drive control circuit is fed with an operation-purpose power supply voltage.
An eleventh aspect of this invention is based on the tenth aspect thereof, and provides an integrated circuit device wherein the constant-current circuit comprises a current mirror circuit; and a constant-current generation circuit connected to an input end of the current mirror circuit for outputting a constant current when being fed with the operation-purpose power supply voltage.
A twelfth aspect of this invention is based on the tenth aspect of this invention, and provides an integrated circuit device wherein the constant-current circuit comprises a current mirror circuit; a constant-current generation circuit for feeding a constant current to an input end of the current mirror circuit; and a current control circuit for applying a current output suspension signal to a common control terminal of the current mirror circuit when the operation-purpose power supply voltage is equal to or lower than a reference voltage.
A thirteenth aspect of this invention is based on the tenth aspect thereof, and provides an integrated circuit device further comprising a protective resistor connected between the output terminal and the constant-current circuit.
A fourteenth aspect of this invention provides an integrated circuit device comprising a circuit board having a wiring pattern; an integrated circuit having an output terminal for connection with a terminal of an external load, and first and second power supply terminals for connection with a terminal of an external power supply, the first and second power supply terminals being separated and disconnected from each other when the integrated circuit is separated from the circuit board, the first and second power supply terminals being connected to each other by the wiring pattern of the circuit board when the integrated circuit is mounted on the circuit board; a switching transistor contained in the integrated circuit and being connected between the output terminal and the first power supply terminal, wherein the switching transistor, the external load, and the external power supply form a load current flow path; and a pull-down resistor contained in the integrated circuit and being connected between the output terminal and the second power supply terminal.
A fifteenth aspect of this invention is based on the fourteenth aspect thereof, and provides an integrated circuit device wherein the integrated circuit comprises an abnormality detection circuit for monitoring a voltage at the output terminal, and detecting an abnormal condition in response to the monitored voltage.
A sixteenth aspect of this invention provides an integrated circuit device comprising a circuit board having a wiring pattern; an integrated circuit having first and second output terminals for connection with a terminal of an external load, and a power supply terminal for connection with a terminal of an external power supply, the first and second output terminals being separated and disconnected from each other when the integrated circuit is separated from the circuit board, the first and second output terminals being connected to each other by the wiring pattern of the circuit board when the integrated circuit is mounted on the circuit board; a switching transistor contained in the integrated circuit and being connected between the first output terminal and the power supply terminal, wherein the switching transistor, the external load, and the external power supply form a load current flow path; and a pull-down resistor contained in the integrated circuit and being connected between the second output terminal and the power supply terminal.
A seventeenth aspect of this invention is based on the sixteenth aspect thereof, and provides an integrated circuit device wherein the integrated circuit comprises an abnormality detection circuit for monitoring a voltage at the first and second output terminals, and detecting an abnormal condition in response to the monitored voltage.